1. Field of the invention
This invention relates to electrical bulk resonators and more particularly to a method for manufacturing a thin film resonator on a membrane over a cavity on a semiconductor substrate as part of a monolithic integrated circuit.
2. Description of Related Art
In the design of radio receivers, particularly paging receivers, cellular radios, and microwave satellite communication systems, it is desirable for components which form the system to take up as little space as possible. It is desirable for as many components as possible to be integrated into a single integrated circuit in the form of monolithic circuits.
A monolithic integrated system, requires less space, is more reliable, has a lower power consumption, has more precise temperature control, and has a higher shock tolerance, than one which requires multiple independent components. It is also easier to produce matched resonator and oscillator circuits when they are produced on the same substrate, and, typically monolithic structures present lower manufacturing costs at every stage of design and production. Thus the advantages of monolithic integration are numerous.
An important element used in the type of equipment mentioned above is an electronic filter. The present state of the art employs resonant electromechanical structures in designing such filters. The structures and materials used depend on the frequencies of the signals involved, and can be separated into three major categories, (a) mechanical, (b) quartz crystals and (c) piezoelectric materials.
The later are particularly useful for frequencies above about 300 Mhz where a thin film non-conductive piezoelectric resonator is commonly used. Such resonators may be one of two basic types, a surface acoustic resonator (SAW) or a bulk acoustic resonator (BAW). SAW resonators don""t respond well at frequencies above 2 GHz, and are not able to handle radio frequency (RF) signals at high power.
BAW resonators on the other hand, do not suffer such limitations. BAW resonators in their basic form comprise a piezoelectric material sandwiched between two opposing electrodes. Such resonators, however, in order to perform with the required efficiency require an unsupported structure, which means that when such resonators are used as a part of an integrated circuit structure, such as a CMOS, they should be placed either over a cavity in the semiconductor support, or should be elevated therefrom. In addition such BAW resonators, in order to be commercially useful, should be able to be manufactured as part of the normal CMOS and Bipolar silicon processing techniques.
The art has both recognized the advantages of a monolithic BAW resonator and the need to build such resonator as an unsupported structure. A solution to this design problem is proposed in U.S. Pat. No. 5,260,596, issued Nov. 9, 1993 to Dunn et al.
According to Dunn et al. unsupported mechanical, quartz and piezoelectric electromechanical resonators may be constructed on a support such as a silicon semiconductor wafer, by first micro-machining a cavity in the substrate and filling the cavity with a sacrificial non silicon filler such as a phosphorous silicate glass (PSG). The resonator is next built on the sacrificial filler and extends beyond the cavity limits to the substrate surface. The filler provides support during the manufacturing steps. Once the resonator structure is completed the sacrificial filler is removed by etching. The result is a BAW resonator that is constructed over a cavity and is, therefore substantially unsupported.
While the disclosed resonator offers advantages over prior resonators, the method of its fabrication, which requires first creating the cavity, then filling and finally etching the filler away from under the resonator itself, is not a method that can be readily incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits. Further more, the etching process to remove the filler material disclosed in the prior art is a liquid etching process which also attacks aluminum and which sometimes washes away small parts of the circuit.
Clearly there is still a need for a resonator which can be monolithically integrated with other semiconductor devices, in which the bulk structure resonator is not in contact with anything which would inhibit vibration. However, there is also as clearly a need for a method to fabricate this resonator which can be readily integrated in the typical monolithic integrated circuit manufacturing processes and which is less harsh on the materials used to construct the resonator.
It is, therefore, an object of the present invention to provide a method and resulting resonator whose manufacturing steps may be readily integrated in a typical CMOS or Bipolar Silicon processing or added to such process as a post process step.
The above object is obtained in accordance with this invention through a new bulk resonator incorporated in the traditional fabrication techniques used in the fabrication of monolithic integrated circuits on a wafer. The resonator is decoupled from the wafer by a cavity etched under the resonator using selective etching through front openings (vias) in a resonator membrane.
As an example, the resonator may be a bulk type resonator, fabricated on a semiconductor wafer support preferably using a piezoelectric material, having the following structure:
(a) A semiconductor wafer support.
(b) A cavity extending through the surface of the wafer partially into the support body;
(c) a piezoelectric membrane extending over the support and the cavity. The membrane has an area over the cavity, an underside facing the support surface and a topside opposite the underside.
(d) A first electrode is adhered to the piezoelectric membrane underside over a portion of the membrane area over that extends over the cavity.
(e) There is a second electrode on the topside of the piezoelectric membrane over the first electrode and substantially coextensive with it.
(f) There is also at least one via in the piezoelectric membrane adjacent the first and second electrodes.
Preferably there is also a isolation layer between the wafer surface and the underside of the piezoelectric membrane, and the cavity is formed at least in the isolation layer. The isolation layer may be a high resistivity layer.
Such structure may be fabricated to generate a bulk resonator structure on a wafer by a method comprising the steps of:
(A) forming a isolation layer on an upper surface of the wafer;
(B) depositing over the isolation layer a first conductive layer and patterning the first conductive layer to form a first electrode;
(C) depositing over the isolation layer and first electrode a piezoelectric layer;
(D) forming a second electrode over the piezoelectric layer and over the first electrode;
(E) opening at least one via through the piezoelectric layer along at least one side of the first electrode and spaced therefrom; and
(F) using a dry etching process to form a cavity under the first electrode and adjacent piezoelectric layer by etching away at least a portion of the isolation layer under the first electrode and adjacent portions of piezoelectric layer by introducing an etchant through the via, selected to etch the isolation layer and to not significantly attack the piezoelectric layer and the electrodes.
Typically, in step (C), a plurality of vias are opened, surrounding the first electrode and the dry etching step is a gaseous etch process. When the wafer is a silicon semiconductor wafer and the isolation layer is a sputtered silicon layer deposited over the wafer surface, the etching step preferably uses xenon difluoride (XeF2).
Using the above method, one may fabricate during the normal manufacturing steps common in the fabrication of monolithic circuits a bulk acoustic resonator on a silicon wafer, with electrodes made of Al, and a AlN piezoelectric membrane. The membrane is self supporting and extends completely over a cavity etched under the electrodes in the supporting wafer. The membrane is isolated from the silicon semiconductor wafer surface by a high resistivity sputtered silicon layer deposited between the membrane undersurface and the silicon support surface, and includes a plurality of vias extending therethrough located adjacent to and around said electrodes.